View 74ABT648N_902990.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

INTEGRATED CIRCUITS
74ABT648 Octal transceiver/register, inverting (3-State)
Product specification Supersedes data of 1995 Apr 17 IC23 Data Handbook 1998 Jun 08
Philips Semiconductors
Philips Semiconductors
Product specification
Octal bus transceiver/register, inverting (3-State)
74ABT648
FEATURES
* Combines 74ABT245 and 74ABT374 type functions in one device * Independent registers for A and B buses * Multiplexed real-time and stored data * Output capability: +64mA/-32mA * Power-up 3-state * Power-up reset * Live insertion/extraction permitted * Latch-up protection exceeds 500mA per Jedec Std 17 * ESD protection exceeds 2000 V per MIL STD 883 Method 3015
and 200 V per Machine Model
The 74ABT648 transceiver/register consists of bus transceiver circuits with inverting 3-State outputs, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or the internal registers. Data on the A or B bus will be clocked into the registers as the appropriate clock pin goes High. Output Enable (OE) and DIR pins are provided to control the transceiver function. In the transceiver mode, data present at the high impedance port may be stored in either the A or B register or both. The Select (SAB, SBA) pins determine whether data is stored or transferred through the device in real-time. The DIR determines which bus will receive data when the OE is active (Low). In the isolation mode (OE = High), data from Bus A may be stored in the B register and/or data from Bus B may be stored in the A register. Outputs from real-time, or stored registers will be inverted. When an output function is disabled, the input function is still enabled and may be used to store and transmit data. Only one of the two buses, A or B may be driven at a time. The examples on the next page demonstrate the four fundamental bus management functions that can be performed with the 74ABT648.
DESCRIPTION
The 74ABT648 high-performance BiCMOS device combines low static and dynamic power dissipation with high speed and high output drive.
QUICK REFERENCE DATA
SYMBOL tPLH tPHL CIN CI/O ICCZ PARAMETER Propagation delay An to Bn or Bn to An Input capacitance CP, S, OE, DIR I/O capacitance Total supply current CONDITIONS Tamb = 25C; GND = 0V CL = 50pF; VCC = 5V VI = 0V or VCC Outputs disabled; VO = 0V or VCC Outputs disabled; VCC =5.5V TYPICAL 5.9 4 7 110 UNIT ns pF pF A
ORDERING INFORMATION
PACKAGES 24-Pin Plastic DIP 24-Pin plastic SO 24-Pin Plastic SSOP Type II 24-Pin Plastic TSSOP Type I TEMPERATURE RANGE -40C to +85C -40C to +85C -40C to +85C -40C to +85C OUTSIDE NORTH AMERICA 74ABT648 N 74ABT648 D 74ABT648 DB 74ABT648 PW NORTH AMERICA 74ABT648 N 74ABT648 D 74ABT648 DB 74ABT648PW DH DWG NUMBER SOT222-1 SOT137-1 SOT340-1 SOT355-1
PIN CONFIGURATION
CPAB SAB DIR A0 A1 A2 A3 A4 A5 A6 A7 GND 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 VCC CPBA SBA OE B0 B1 B2 B3 B4 B5 B6 B7
PIN DESCRIPTION
PIN NUMBER 1, 23 2, 22 3 4, 5, 6, 7, 8, 9, 10, 11 20, 19, 18, 17, 16, 15, 14, 13 21 12 24 SYMBOL CPAB / CPBA SAB / SBA DIR A0 - A7 B0 - B7 OE GND VCC FUNCTION A to B clock input / B to A clock input A to B select input / B to A select input Direction control input Data inputs/outputs (A side) Data inputs/outputs (B side) Output enable input (active-Low) Ground (0V) Positive supply voltage
SA00082
1998 Jun 08
2
853-1613 19516
Philips Semiconductors
Product specification
Octal bus transceiver/register, inverting (3-State)
74ABT648
LOGIC SYMBOL
LOGIC SYMBOL (IEEE/IEC)
21 4 5 6 7 8 9 10 11 3 22 A0 A1 A2 A3 A4 A5 A6 A7 2 23 1 G3 3EN1 [BA] 3EN2 [AB] G6 G7 C4 C5
1 2 3 23 22 21
CPAB SAB DIR CPBA SBA OE
4
1 1
6 61
4D
20
5D B0 B1 B2 B3 B4 B5 B6 B7 5 20 19 18 17 16 15 14 13 6 7 8 9 10 11 1
7 7
1 2 19 18 17 16 15 14 13
SA00083
SA00156
REAL TIME BUS TRANSFER BUS B TO BUS A
REAL TIME BUS TRANSFER BUS A TO BUS B
STORAGE FROM A, B, OR A AND B
TRANSFER STORED DATA TO A OR B
OE L
DIR CPAB CPBA SAB SBA L X X X L
}
OE L H
DIR CPAB CPBA SAB SBA X X L X
}
OE L L H H X X
DIR CPAB CPBA SAB SBA X X L X X X X X
}
OE L L L H
DIR CPAB CPBA SAB SBA H H or L H or L X X H H X
}
SA00177
1998 Jun 08
3
Philips Semiconductors
Product specification
Octal bus transceiver/register, inverting (3-State)
74ABT648
FUNCTION TABLE
INPUTS OE X X H H L L L L H L X * = = = = DIR X X X X L L CPAB X H or L X X CPBA X H or L X H or L SAB X X X X X X SBA X X X X L H An Input Unspecified output* Input Output DATA I/O Bn Unspecified output* Input Input Input Store A, B unspecified Store B, A unspecified Store A and B data Isolation, hold storage Real time B data to A bus Stored B data to A bus OPERATING MODE
H X X L X Real time A data to B bus Input Output H H or L X H X Stored A data to B bus High voltage level Low voltage level Don't care Low-to-High clock transition The data output function may be enabled or disabled by various signals at the OE input. Data input functions are always enabled, i.e., data at the bus pins will be stored on every Low-to-High transition of the clock.
LOGIC DIAGRAM
OE 21
DIR CPBA SBA CPAB SAB
3 23 22 1 2
1of 8 Channels
1D C1 Q
A0
4 1D C1 Q
20
B0
A1 A2 A3 A4 A5 A6 A7
5 6 7 8 9 10 11 DETAIL A X 7
19 18 17 16 15 14 13
B1 B2 B3 B4 B5 B6 B7
SA00081
1998 Jun 08
4
Philips Semiconductors
Product specification
Octal bus transceiver/register, inverting (3-State)
74ABT648
ABSOLUTE MAXIMUM RATINGS1, 2
SYMBOL VCC IIK VI IOK VOUT IOUT Tstg PARAMETER DC supply voltage DC input diode current DC input voltage3 VO < 0 output in Off or High state output in Low state VI < 0 CONDITIONS RATING -0.5 to +7.0 -18 -1.2 to +7.0 -50 -0.5 to +5.5 128 -65 to 150 UNIT V mA V mA V mA C
DC output diode current DC output voltage3
DC output current Storage temperature range
NOTES: 1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150C. 3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
RECOMMENDED OPERATING CONDITIONS
SYMBOL PARAMETER Min VCC VI VIH VIL IOH IOL t/v Tamb DC supply voltage Input voltage High-level input voltage Low-level Input voltage High-level output current Low-level output current Input transition rise or fall rate Operating free-air temperature range 0 -40 4.5 0 2.0 0.8 -32 64 10 +85 LIMITS Max 5.5 VCC V V V V mA mA ns/V C UNIT
1998 Jun 08
5
Philips Semiconductors
Product specification
Octal bus transceiver/register, inverting (3-State)
74ABT648
DC ELECTRICAL CHARACTERISTICS
LIMITS SYMBOL PARAMETER TEST CONDITIONS Tamb = +25C Min VIK Input clamp voltage VCC = 4.5V; IIK = -18mA VCC = 4.5V; IOH = -3mA; VI = VIL or VIH VOH High-level output voltage VCC = 5.0V; IOH = -3mA; VI = VIL or VIH VCC = 4.5V; IOH = -32mA; VI = VIL or VIH VRST VOL
I I OFF
Tamb = -40C to +85C Min Max -1.2 2.5 3.0 2.0
UNIT
Typ -0.9
Max -1.2
V V V V
2.5 3.0 2.0
3.2 3.7 2.3 0.13 0.42 5.0 5.0 0.01 5 5.0 -5.0 5.0 0.55 0.55 100 50 1.0 100 50 -50 50 -180 250 30 250 1.5
Power-up output low voltage3 Low-level output voltage Power-off leakage current Power-up/down 3-State output current4 Input leakage current Control pins Data pins
VCC = 5.5V; IO = 1mA; VI = GND or VCC VCC = 4.5V; IOL = 64mA; VI = VIL or VIH VCC = 0.0V; VI or VO 4.5V VCC = 2.1V; VO = 0.5V; VI = GND or VCC; VOE = Don't care VCC = 5.5V; VI = GND or 5.5V VCC = 5.5V; VI = GND or 5.5V VCC = 5.5V; VO = 2.7V; VI = VIL or VIH VCC = 5.5V; VO = 0.5V; VI = VIL or VIH VCC = 5.5V; VO = 5.5 V; VI = GND or VCC VCC = 5.5V; VO = 2.5V VCC = 5.5V; Outputs High, VI = GND or VCC -50
0.55 0.55 100 50 1.0 100 50 -50 50 -50 -180 250 30 250 1.5
V V A A A A A A A mA A mA A mA
I PU/ PD
II
IIH + IOZH IIL + IOZL
I CEX
3-State output High current 3-State output Low current Output high leakage current Output current1
IO ICCH ICCL ICCZ ICC
-65 110 20 110 0.3
Quiescent supply current
VCC = 5.5V; Outputs Low, VI = GND or VCC VCC = 5.5V; Outputs 3-State; VI = GND or VCC
Additional supply current per input pin2
VCC = 5.5V; one input at 3.4V, other inputs at VCC or GND; VCC = 5.5V
NOTES: 1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second. 2. This is the increase in supply current for each input at 3.4V. 3. For valid test results, data must not be loaded into the flip-flops (or latches) after applying the power. 4. This parameter is valid for any VCC between 0V and 2.1V, with a transition time of up to 10msec. From VCC = 2.1 to VCC = 5V 10% a transition time of up to 100sec is permitted.
1998 Jun 08
6
Philips Semiconductors
Product specification
Octal bus transceiver/register, inverting (3-State)
74ABT648
AC CHARACTERISTICS
GND = 0V, tR = tF = 2.5ns, CL = 50pF, RL = 500 LIMITS SYMBOL PARAMETER WAVEFORM Min fMAX tPLH tPHL tPLH tPHL tPLH tPHL tPZH tPZL tPHZ tPLZ tPZH tPZL tPHZ tPLZ Maximum clock frequency Propagation delay CPAB to Bn or CPBA to An Propagation delay An to Bn or Bn to An Propagation delay SAB to Bn or SBA to An Output enable time OE to An or Bn Output disable time OE to An or Bn Output enable time DIR to An or Bn Output disable time DIR to An or Bn 1 1 2 3 2 3 5 6 5 6 5 6 5 6 125 2.2 1.7 1.0 1.5 1.5 1.5 1.0 2.1 1.5 1.5 1.2 2.5 1.5 1.5 Tamb = +25oC VCC = +5.0V Typ 200 5.3 5.9 3.6 4.2 4.9 5.4 4.3 5.5 6.2 6.0 4.8 6.0 5.9 6.3 6.8 7.4 5.1 5.6 6.1 6.9 5.3 7.4 7.3 7.0 5.7 9.0 6.7 7.2 Max Tamb = -40 to +85oC VCC = +5.0V 0.5V Min 125 2.2 1.7 1.0 1.5 1.5 1.5 1.0 2.1 1.5 1.5 1.2 2.5 1.5 1.5 7.8 8.4 6.1 6.3 7.1 7.7 6.3 8.8 8.3 7.5 6.7 9.5 7.7 8.2 Max MHz ns ns ns ns ns ns ns UNIT
AC SETUP REQUIREMENTS
GND = 0V, tR = tF = 2.5ns, CL = 50pF, RL = 500 LIMITS SYMBOL PARAMETER WAVEFORM Tamb = VCC = +5.0V Min ts(H) ts(L) th(H) th(L) tw(H) tw(L) Setup time An to CPAB, Bn to CPBA Hold time An to CPAB, Bn to CPBA Pulse width, High or Low CPAB or CPBA 4 4 1 3.0 3.0 0.0 0.0 3.5 4.0 +25oC Typ 1.5 1.0 -0.4 -1.0 2.6 1.0 Tamb = -40 to +85oC VCC = +5.0V 0.5V Min 3.0 3.0 0.0 0.0 3.5 4.0 ns ns ns UNIT
1998 Jun 08
7
Philips Semiconductors
Product specification
Octal bus transceiver/register, inverting (3-State)
74ABT648
AC WAVEFORMS
VM = 1.5V, VIN = GND to 3.0V
1/fMAX CPBA or CPAB SBA or SAB VM tw(H) tPHL An or Bn VM VM tw(L) tPLH VM An or Bn VM VM tPLH VM VM tPHL VM An or Bn An or Bn
SA00087
SA00088
Waveform 1. Propagation Delay, Clock Input to Output, Clock Pulse Width, and Maximum Clock Frequency
Waveform 2. Propagation Delay, SAB to Bn or SBA to An
An or Bn An or Bn VM tPHL An or Bn VM VM VM tPLH Bn or An SBA or SAB
CPBA or CPAB
SA00178
NOTE: The shaded areas indicate when the input is permitted to change for predictable output performance.
Waveform 3. Propagation Delay, An to Bn or Bn to An and SBA to An or SAB to Bn
OE OE VM DIR tPZH tPHZ VOH -0.3V 0V An or Bn VM VM DIR tPZL tPLZ VM
An or Bn
VM
SA00179
Waveform 5. 3-State Output Enable Time to High Level and Output Disable Time from High Level
Waveform 6. 3-State Output Enable Time to Low Level and Output Disable Time from Low Level
1998 Jun 08
8
EEEEEEEEE EEE E EEEEEEEEE EEE E EEEEEEEEE EEE E
VM VM VM VM ts(H) th(H) ts(L) th(L) tW(L) VM VM
SA00090
Waveform 4. Data Setup and Hold Times
VM
VOL +0.3V 0V
SA00180
Philips Semiconductors
Product specification
Octal bus transceiver/register, inverting (3-State)
74ABT648
TEST CIRCUIT AND WAVEFORM
7V From Output Under Test CL = 50 pF 500 S1 Open GND 500
Load Circuit
TEST tpd tPLZ/tPZL tPHZ/tPZH
S1 open 7V open
DEFINITIONS Load capacitance includes jig and probe capacitance; CL = see AC CHARACTERISTICS for value.
SA00012
1998 Jun 08
9
Philips Semiconductors
Product specification
Octal bus transceiver/register, inverting (3-State)
74ABT648
DIP24: plastic dual in-line package; 24 leads (300 mil)
SOT222-1
1998 Jun 08
10
Philips Semiconductors
Product specification
Octal bus transceiver/register, inverting (3-State)
74ABT648
SO24: plastic small outline package; 24 leads; body width 7.5 mm
SOT137-1
1998 Jun 08
11
Philips Semiconductors
Product specification
Octal bus transceiver/register, inverting (3-State)
74ABT648
SSOP24: plastic shrink small outline package; 24 leads; body width 5.3 mm
SOT340-1
1998 Jun 08
12
Philips Semiconductors
Product specification
Octal bus transceiver/register, inverting (3-State)
74ABT648
TSSOP24: plastic thin shrink small outline package; 24 leads; body width 4.4 mm
SOT355-1
1998 Jun 08
13
Philips Semiconductors
Product specification
Octal transceiver/register, inverting (3-State)
74ABT648
Data sheet status
Data sheet status Objective specification Preliminary specification Product specification Product status Development Qualification Definition [1] This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make chages at any time without notice in order to improve design and supply the best possible product. This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product.
Production
[1] Please consult the most recently issued datasheet before initiating or completing a design.
Definitions
Short-form specification -- The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition -- Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information -- Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification.
Disclaimers
Life support -- These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes -- Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088-3409 Telephone 800-234-7381 (c) Copyright Philips Electronics North America Corporation 1998 All rights reserved. Printed in U.S.A. print code Document order number: Date of release: 06-98 9397-750-04022
Philips Semiconductors
yyyy mmm dd 14

▲Up To Search▲

Price & Availability of 74ABT648N

	To Download 74ABT648N Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .